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data sheet no. pd60277 features floating channel designed for bootstrap operation to +600 v tolerant to negative transient voltage, dv/dt immune gate drive supply range from 10 v to 20 v undervoltage lockout for both channels 3.3 v, 5 v, and 15 v input logic input compatible cross-conduction prevention logic matched propagation delay for both channels lower di/dt gate driver for better noise immunity internal 100 ns deadtime output in phase with input half-bridge driver product summary v offset 600 v max. i o +/- (min) 60 ma/130 ma v out 10 v - 20 v delay matching 50 ns internal deadtime 100 ns t on/off (typ.) 150 ns/150 ns irs2304(s)pbf www.irf.com 1 lin hin vcc com vb ho vs lo vcc hin lin up to 600 v to load block diagram package 8 lead soic 8-lead pdip description the irs2304 is a high voltage, high speed power mosfet and igbt driver with independent high-side and low-side referenced output channels. proprietary hvic and latch immune cmos technologies enable ruggedized monolithic construction. the logic input is compatible with standard cmos or lsttl output, down to 3.3 v logic. the output driver features a high pulse current buffer stage designed for minimum driver cross-conduction. the floating chan- nel can be used to drive an n-chan- nel power mosfet or igbt in the high-side configuration which oper- ates up to 600 v. part input logic cross- conduction prevention logic deadtime (ns) ground pins t on /t off (ns) 2106/2301 com 21064 hin/lin no none v ss /com 220/200 2108 internal 540 com 21084 hin/lin yes programmable 540 - 5000 v ss /com 220/200 2109/2302 internal 540 com 21094 in/sd yes programmable 540 - 5000 v ss /com 750/200 feature comparison 2304 hin/lin yes internal 100 com 160/140 (refer to lead assignments for cor- rect pin configuration). these dia- grams show electrical connections only. please refer to our application notes and designtips for proper cir- cuit board layout. pdf created with pdffactory trial version www.pdffactory.com ? rohs compliant
irs2304(s)pbf www.irf.com 2 note 1: logic operational for v s of com -5 v to com +600 v. logic state held for v s of com -5 v to com -v bs . symbol definition min. max. units v s high-side offset voltage v b - 25 v b + 0.3 v b high-side floating supply voltage -0.3 625 v ho high-side floating output voltage ho v s - 0.3 v b + 0.3 v cc low-side and logic fixed supply voltage -0.3 25 v lo low-side output voltage lo -0.3 v cc + 0.3 v in logic input voltage (hin, lin) -0.3 v cc + 0.3 com logic ground v cc -25 v cc + 0.3 dv s /dt allowable offset supply voltage transient ? 50 v/ns p d package power dissipation @ t a +25 c 8-lead soic ? 0.625 8-lead pdip ? 1.0 rth ja thermal resistance, junction to ambient 8-lead soic ? 200 8-lead pdip ? 125 t j junction temperature ? 150 t s storage temperature -50 150 t l lead temperature (soldering, 10 seconds) ? 300 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com, all currents are defined positive into any lead. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. v c symbol definition min. max. units v b high-side floating supply voltage v s + 10 v s + 20 v s high-side floating supply offset voltage note 1 600 v ho high-side (ho) output voltage v s v b v lo low-side (lo) output voltage com v cc v in logic input voltage (hin, lin) com v cc v cc low-side supply voltage 10 20 t a ambient temperature -40 125 c recommended operating conditions the input/output logic timing diagram is shown in fig. 1. for proper operation the device should be used within the recommended conditions. the v s offset rating is tested with all supplies biased at 15 v differential. v w c/w
irs2304(s)pbf www.irf.com 3 symbol definition min. typ.max.unitstest conditions v ccuv+ v cc and v bs supply undervoltage positive going 8 8.9 9.8 v bsuv+ threshold v ccuv- v cc and v bs supply undervoltage negative going 7.4 8.2 9 v bsuv- threshold v ccuvh v cc supply undervoltage lockout hysteresis 0.3 0.7 ? v bsuvh i lk offset supply leakage current ? ? 50 v b = v s = 600 v i qbs quiescent v bs supply current 20 60 150 i qcc quiescent v cc supply current 50 120 240 v ih logic ?1? input voltage 2.3 ? ? v il logic ?0? input voltage ? ? 0.7 v oh high level output voltage, v bias - v o ? 0.05 0.2 v ol low level output voltage, v o ? 0.02 0.1 i in+ logic ?1? input bias current ? 5 40 v in = 5 v i in- logic ?0? input bias current ? 1.0 5.0 v in = 0 v i o+ output high short circuit pulse current 60 290 ? i o- output low short circuit pulsed current 130 600 ? static electrical characteristics v bias (v cc , v bs ) = 15 v and t a = 25 c unless otherwise specified. the v in , v th, and i in parameters are referenced to com. the v o and i o parameters are referenced to com and v s is applicable to ho and lo. v v symbol definition min. typ.max.unitstest conditions t on turn-on propagation delay 90 150 210 v s = 0 v t off turn-off propagation delay 90 150 210 v s = 0 v or 600 v t r turn-on rise time ? 70 120 t f turn-off fall time ? 35 60 dt deadtime 80 100 190 mt delay matching, hs & ls turn-on/off ? ? 50 dynamic electrical characteristics v bias (v cc , v bs ) = 15 v, v s = com, c l = 1000 pf and t a = 25 c unless otherwise specified. v o = 0 v pw 10 s ns m a i o = 2 ma ma m a v in = 0 v or 5 v pdf created with pdffactory trial version www.pdffactory.com
irs2304(s)pbf www.irf.com 4 functional block diagram 2304 lin uv detect dela com lo vcc hin vs ho vb pulse filter hv level shifter r r s q uv detect pulse generator shoot- through prevention lead definitions symbol description v cc low-side supply voltage comlogic ground and low-side driver return hinlogic input for high-side gate driver output linlogic input for low-side gate driver output v b high-side floating supply hohigh-side driver output v s high voltage floating supply return lolow-side driver output
irs2304(s)pbf www.irf.com 8 7 6 4 3 2 1 lin com hin vcc lo ho vb vs 5 8-lead pdip 8 7 6 4 3 2 1 lin com hin vcc lo ho vb vs 5 lead assignments 8-lead soic hin lin ho lo figure 1. input/output functionality diagram internal deadtime
irs2304(s)pbf www.irf.com 6 figure 3. internal deadtime timing figure 2. switching time waveforms hin lin ho lo t on t r 50% 90% 10% 50% 90% 10% t off t f hin lin dt dt 90% 10% 50% 90% 10% 50% lo ho
irs2304(s)pbf www.irf.com 7 max. typ. min. 7 8 9 10 11 12 -50 -25 0 25 50 75 100 125 temperature ( o c) v c c a n d figure 4. v cc and v bs undervoltage threshold (+) vs. temperature max. typ. min. 6 7 8 9 10 11 -50 -25 0 25 50 75 100 125 temperature ( o c) v c c u v l o t h r e s h o l d ( - ) (v) figure 5. v cc / v dd undervoltage threshold (-) vs. temperature max. 0 60 120 180 240 300 -50 -25 0 25 50 75 100 125 temperature ( o c) o f f s e t s u p p ly l e a k a g e c u r r e n t ( m a) figure 6a. offset supply leakage current vs. temperature max. 0 60 120 180 240 300 0 100 200 300 400 500 600 v b boost voltage (v) o f f s e t supp ly leak ag e c u r r en t ( m a) figure 6b. offset supply leakage current vs. supply voltage pdf created with pdffactory trial version www.pdffactory.com v bs u v l o t h r e s h o l d ( +) (v)
irs2304(s)pbf www.irf.com 8 max. typ. min. 0 60 120 180 240 300 -50 -25 0 25 50 75 100 125 temperature ( o c) v figure 7a. v bs supply current vs. temperature min. typ. max. 0 60 120 180 240 300 10 12 14 16 18 20 v bs supply voltage (v) v bs supply current ( m a) figure 7b. v bs supply current vs. supply voltage typ. max. min. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) v c c s u p p l y c u r r e n t ( m a) figure 8a. quiescent v cc supply current vs. temperature typ. min. max. 0 100 200 300 400 500 10 12 14 16 18 20 v cc supply voltage (v) v c c s u p p l y c u r r e n t ( m a) figure 8b. quiescent v cc supply current vs. supply voltage pdf created with pdffactory trial version www.pdffactory.com bs supply current ( m a)
irs2304(s)pbf www.irf.com 9 min. 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature ( o c) i n p u t v o l t a g e ( v ) figure 9a. logic "1" input voltage vs. temperature min. 0 1 2 3 4 5 6 5 10 15 20 supply voltage (v) i n p u t v o l t a g e ( v ) figure 9b. logic "1" input voltage vs. supply voltage max. 0 1 2 3 4 -50 -25 0 25 50 75 100 125 temperatre ( o c) i n p u t v o l t a g e ( v ) figure 10a. logic "0" input voltage vs. temperature max. 0 1 2 3 4 10 12 14 16 18 20 supply voltage (v) i n p u t v o l t a g e ( v ) figure 10b. logic "0" input voltage vs. supply voltage pdf created with pdffactory trial version www.pdffactory.com
irs2304(s)pbf www.irf.com 10 max. 0.0 0.1 0.2 0.3 0.4 0.5 -50 -25 0 25 50 75 100 125 temperature ( o c) h ig h l e v e l o u t p u t v o lt a g e ( v ) figure 11a. high level output voltage vs. temperature (i o = 2 ma) max 0.0 0.1 0.2 0.3 0.4 0.5 10 12 14 16 18 20 v bias supply voltage (v) h ig h l e v e l o u t p u t v o l t a g e ( v ) figure 11b. high level output voltage vs. supply voltage (i o = 2 ma) max. 0.00 0.05 0.10 0.15 0.20 -50 -25 0 25 50 75 100 125 temperature ( o c) l o w l e v e l o u t p u t v o l t a g e ( v ) figure 12a. low level output voltage vs.temperature (i o = 2 ma) max 0.00 0.05 0.10 0.15 0.20 10 12 14 16 18 20 low level output voltage (v) f i g u r e 1 2 b . l o w l e v e l o u t p u t v s . s u p p l y vo l t a ge (i o = 2 m a) p d f c r ea t ed w i t h pd f f a c t o r y t r i a l v e r s i on www.pdffactory.com v bias supply voltage (v)
irs2304(s)pbf www.irf.com 11 typ. max. 0 25 50 75 100 -50 -25 0 25 50 75 100 125 logic "1" input curren t (a) figure 13a. logic "1" input current vs. temperature temperature ( o c) typ. max. 0 10 20 30 40 50 10 12 14 16 18 20 v cc supply voltage (v) logic "1" input current (a)) figure 13b. logic "1" input current vs. supply voltage max 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature (c) l o g i c " 0 " i n p u t b i a s c u r r e n t ( a ) figure 14a. logic "0" input bias current vs. temperature max 0 1 2 3 4 5 6 10 12 14 16 18 20 supply voltage (v) l o g i c " 0 " i n p u t b i a s c u r r e n t ( a ) figure 14b. logic "0" input bias current vs. voltage
irs2304(s)pbf www.irf.com 12 min. 0 25 50 75 100 -50 -25 0 25 50 75 100 125 temperature ( o c) o u t p u t s o u r c e c u r r e n t ( ma ) figure 15a. output source current vs. temperature min. 0 25 50 75 100 10 12 14 16 18 20 v bias supply voltage (v) o u t p u t s o u r c e c u r r e n t ( ma ) figure 15b. output source current vs. supply voltage min. 0 50 100 150 200 -50 -25 0 25 50 75 100 125 temperature ( o c) o u t p u t s i n k c u r r e n t ( ma ) figure 16a. output sink current vs.temperature min. 0 50 100 150 200 10 12 14 16 18 20 v bias supply voltage (v) o u t p u t s in k c u r r e n t ( m a ) figure 16b. output sink current vs. supply voltage pdf created with pdffactory trial version www.pdffactory.com
irs2304(s)pbf www.irf.com 13 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature( o c) t u r n - on d e l a y t ime ( n s ) . figure 17a. turn-on propagation delay vs. temperature typ. max 0 100 200 300 400 500 10 12 14 16 18 20 supply voltage (v) t u r n -on d e la y t ime ( n s ) . figure 17b. turn-on propagation delay vs. supply voltage typ. max typ. max. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature( o c) t u r n - o f f t i m e ( n s ) figure 18a. turn-off propagation delay vs. temperature max. typ. 0 100 200 300 400 500 10 12 14 16 18 20 supply voltage (v) t u r n - o f f t ime ( n s ) figure 18b. turn-off propagation delay vs. supply voltage pdf created with pdffactory trial version www.pdffactory.com
irs2304(s)pbf www.irf.com 14 typ. max. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) t u r n - o n r i s e t i m e ( n s ) . figure 19a. turn-on rise time vs.temperature typ max 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) t u r n - o n r i s e t i m e ( n s ) . figure 19b. turn-on rise time vs. supply voltage typ. max. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) figure 20a. turn-off fall time vs. temperature typ max 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) figure 20b. turn-off fall time vs. supply voltage turn-off fall time (n s) turn-off fall time (n s)
irs2304(s)pbf www.irf.com 15 max. typ. min. 0 50 100 150 200 250 300 -50 -25 0 25 50 75 100 125 temperature ( o c) dea dt i me ( n s ) figure 21a. deadtime vs. temperature min. typ. max. 0 50 100 150 200 250 300 10 12 14 16 18 20 supply voltage (v) figure 21b. deadtime supply voltage typ. -10 -8 -6 -4 -2 0 10 12 14 16 18 20 v bs floating supply voltage (v) v s o f f s e t s u p p l y v o l t a g e ( v ) figure 22. maximum v s negative offset vs. supply voltage 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) 140 v 70 v 0 v figure 23. irs 2304 vs. frequency (irfbc20), r gate =33 w , v cc =15 v pdf created with pdffactory trial version www.pdffactory.com dea dt i me ( n s ) vs. tempe rature ( o c)
irs2304(s)pbf www.irf.com 16 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) t e m p e r a t u r e ( o c) 140 v 70 v 0 v figure 24. irs2304 vs. frequency (irfbc30), 20 40 60 80 100 120 140 1 10 100 111000 frequency (khz) tempe rature ( o c ) 140 v 70 v 0 v figure 25. irs2304 vs. frequency (irfbc40), 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) figure 26. irs2304 vs. frequency (irfpe50), 70 v 0 v 140 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) tempe rature ( o c) figure 27. irs2304s vs. frequency (irfbc20), 140 v 70 v 0 v pdf created with pdffactory trial version www.pdffactory.com r gate =22 w , v cc =15 v r gate =15 w , v cc =15 v r gate =33 w , v cc =15 v r gate =10 w , v cc =15 v tempe rature ( o c)
irs2304(s)pbf www.irf.com 17 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) t e m p e r a t u r e ( o c) 140 v 70 v 0 v figure 28. irs2304s vs. frequency (irfbc30), r gate =22 w , v cc =15 v 20 40 60 80 100 120 140 1 10 100 1000 f r e q u e n c y ( k h z) t e m p e r a t u r e ( o c ) 0 v figure 29. irs2304s vs. frequency (irfbc40), r gate =15 w , v cc =15 v 1140 v 70 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) t e m p r e t u r e ( o c) figure 30. ir2304s vs. frequency (irfpb50), pdf created with pdffactory trial version www.pdffactory.com r gate =10 w , v cc =15 v 140 v 70 v 0 v
irs2304(s)pbf www.irf.com18 01-602? 01-0021 11 (ms-012aa) 8 lead soic 87 5 65 d b e a e 6x h 0.25 [.010] a 6 4 3 12 4. outline c onforms to jedec outline ms-012aa. notes: 1. dimensioning & tolerancing per asme y14.5m-1994. 2. controlling dimension: millimeter 3. dimensions are shown in millimeters [inches]. 7 k x 45 8x l 8x c y footprint 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 8x 1.78 [.070] 5 dimension does not include mold protrusions. 6 dimension does not include mold protrusions. mo ld p rotrus io ns no t to exc eed 0.25 [.010]. 7 dimens ion is the leng th of lead fo r soldering to a substrate. mo ld p rotrus io ns no t to exc eed 0.15 [.006]. 0.25 [.010] c a b e1 a a1 8x b c 0.10 [.004] e1 d e y b a a1 h k l .189 .1497 0 .013 .050 b asic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 basic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 min max millimeters in c h e s min max dim 8 e c .0075 .0098 0.19 0.25 .025 b asic 0.635 b asic 01-6014 01-3003 01 (ms-001ab) 8-lead pdip case outlines
irs2304(s)pbf www.irf.com 19 carrier tape dimension for 8soicn code min max min max a 7.90 8.10 0.311 0.318 b 3.90 4.10 0.153 0.161 c 11.70 12.30 0.46 0.484 d 5.45 5.55 0.214 0.218 e 6.30 6.50 0.248 0.255 f 5.10 5.30 0.200 0.208 g 1.50 n/a 0.059 n/a h 1.50 1.60 0.059 0.062 metric imperial reel dimensions for 8soicn code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 18.40 n/a 0.724 g 14.50 17.10 0.570 0.673 h 12.40 14.40 0.488 0.566 metric imperial e f a c d g a b h note : controlling dimension in mm loaded tape feed direction a h f e g d b c tape & reel 8-lead soic pdf created with pdffactory trial version www.pdffactory.com
irs2304(s)pbf 20 order information 8-lead pdip IRS2304PBF 8-lead soic irs2304spbf 8-lead soic tape & reel irs2304strpbf ir world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105 leadfree part marking information lead free released non-lead free released part number date code irsxxxxx yww? ?xxxx pin 1 identifier ir logo lot code (prod mode - 4 digit spn code) assembly site code per scop 200-002 p ? marking code www.irf.com the soic-8 is msl2 qualified. this product has been designed and qualified for the industrial level. qualification standards can be found at www.irf.com data and specifications subject to change without notice. 12/4/2006

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